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<p>DMA channle control structure.  
 <a href="struct_x_dma_ps___chan_ctrl.html#details">More...</a></p>
<table class="memberdecls">
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Data Fields</h2></td></tr>
<tr class="memitem:ab4afe06f49cc4f916ef106f1e9e367f2"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#ab4afe06f49cc4f916ef106f1e9e367f2">EndianSwapSize</a></td></tr>
<tr class="memdesc:ab4afe06f49cc4f916ef106f1e9e367f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Endian swap size.  <a href="#ab4afe06f49cc4f916ef106f1e9e367f2">More...</a><br/></td></tr>
<tr class="separator:ab4afe06f49cc4f916ef106f1e9e367f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a39c795a67feb2cee1761d7a968e233f3"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#a39c795a67feb2cee1761d7a968e233f3">DstCacheCtrl</a></td></tr>
<tr class="memdesc:a39c795a67feb2cee1761d7a968e233f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Destination cache control.  <a href="#a39c795a67feb2cee1761d7a968e233f3">More...</a><br/></td></tr>
<tr class="separator:a39c795a67feb2cee1761d7a968e233f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad3dc23d0ec01d4f49debed893cffa52d"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#ad3dc23d0ec01d4f49debed893cffa52d">DstProtCtrl</a></td></tr>
<tr class="memdesc:ad3dc23d0ec01d4f49debed893cffa52d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Destination protection control.  <a href="#ad3dc23d0ec01d4f49debed893cffa52d">More...</a><br/></td></tr>
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<tr class="memitem:a853e35c04d6373b1c91b4d3b85fd21ab"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#a853e35c04d6373b1c91b4d3b85fd21ab">DstBurstLen</a></td></tr>
<tr class="memdesc:a853e35c04d6373b1c91b4d3b85fd21ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Destination burst length.  <a href="#a853e35c04d6373b1c91b4d3b85fd21ab">More...</a><br/></td></tr>
<tr class="separator:a853e35c04d6373b1c91b4d3b85fd21ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a35b7ed4be966942dca1a4732494068e5"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#a35b7ed4be966942dca1a4732494068e5">DstBurstSize</a></td></tr>
<tr class="memdesc:a35b7ed4be966942dca1a4732494068e5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Destination burst size.  <a href="#a35b7ed4be966942dca1a4732494068e5">More...</a><br/></td></tr>
<tr class="separator:a35b7ed4be966942dca1a4732494068e5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae02d61b30e6bf2940560c5719cf78ea9"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#ae02d61b30e6bf2940560c5719cf78ea9">DstInc</a></td></tr>
<tr class="memdesc:ae02d61b30e6bf2940560c5719cf78ea9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Destination incrementing or fixed address.  <a href="#ae02d61b30e6bf2940560c5719cf78ea9">More...</a><br/></td></tr>
<tr class="separator:ae02d61b30e6bf2940560c5719cf78ea9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a792a21894718b12c8ccf1fa97318dbbf"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#a792a21894718b12c8ccf1fa97318dbbf">SrcCacheCtrl</a></td></tr>
<tr class="memdesc:a792a21894718b12c8ccf1fa97318dbbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Source cache control.  <a href="#a792a21894718b12c8ccf1fa97318dbbf">More...</a><br/></td></tr>
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<tr class="memitem:a3dd33f6f79803e204573e5ca5d88d9d9"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#a3dd33f6f79803e204573e5ca5d88d9d9">SrcProtCtrl</a></td></tr>
<tr class="memdesc:a3dd33f6f79803e204573e5ca5d88d9d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Source protection control.  <a href="#a3dd33f6f79803e204573e5ca5d88d9d9">More...</a><br/></td></tr>
<tr class="separator:a3dd33f6f79803e204573e5ca5d88d9d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af1c78aea07f0790355317bd311ebb3ff"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#af1c78aea07f0790355317bd311ebb3ff">SrcBurstLen</a></td></tr>
<tr class="memdesc:af1c78aea07f0790355317bd311ebb3ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Source burst length.  <a href="#af1c78aea07f0790355317bd311ebb3ff">More...</a><br/></td></tr>
<tr class="separator:af1c78aea07f0790355317bd311ebb3ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a17ee9116237a176efec405cb12461288"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#a17ee9116237a176efec405cb12461288">SrcBurstSize</a></td></tr>
<tr class="memdesc:a17ee9116237a176efec405cb12461288"><td class="mdescLeft">&#160;</td><td class="mdescRight">Source burst size.  <a href="#a17ee9116237a176efec405cb12461288">More...</a><br/></td></tr>
<tr class="separator:a17ee9116237a176efec405cb12461288"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3585627ef02899b75c5f2f716d3ab52f"><td class="memItemLeft" align="right" valign="top">unsigned int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dma_ps___chan_ctrl.html#a3585627ef02899b75c5f2f716d3ab52f">SrcInc</a></td></tr>
<tr class="memdesc:a3585627ef02899b75c5f2f716d3ab52f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Source incrementing or fixed address.  <a href="#a3585627ef02899b75c5f2f716d3ab52f">More...</a><br/></td></tr>
<tr class="separator:a3585627ef02899b75c5f2f716d3ab52f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>DMA channle control structure. </p>
<p>It's for AXI bus transaction. This struct will be translated into a 32-bit channel control register value. </p>
</div><h2 class="groupheader">Field Documentation</h2>
<a class="anchor" id="a853e35c04d6373b1c91b4d3b85fd21ab"></a>
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::DstBurstLen</td>
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<p>Destination burst length. </p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>, <a class="el" href="group__dmaps.html#gabc2e04f69037f0bdba33275ae017af8a">XDmaPs_GenDmaProg()</a>, and <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

</div>
</div>
<a class="anchor" id="a35b7ed4be966942dca1a4732494068e5"></a>
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::DstBurstSize</td>
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<p>Destination burst size. </p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>, <a class="el" href="group__dmaps.html#gabc2e04f69037f0bdba33275ae017af8a">XDmaPs_GenDmaProg()</a>, and <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

</div>
</div>
<a class="anchor" id="a39c795a67feb2cee1761d7a968e233f3"></a>
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::DstCacheCtrl</td>
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<p>Destination cache control. </p>

<p>Referenced by <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

</div>
</div>
<a class="anchor" id="ae02d61b30e6bf2940560c5719cf78ea9"></a>
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::DstInc</td>
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<p>Destination incrementing or fixed address. </p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>, <a class="el" href="group__dmaps.html#gabc2e04f69037f0bdba33275ae017af8a">XDmaPs_GenDmaProg()</a>, <a class="el" href="group__dmaps.html#ga3691ba115c788c4f68a05cf05c486eeb">XDmaPs_Start()</a>, and <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

</div>
</div>
<a class="anchor" id="ad3dc23d0ec01d4f49debed893cffa52d"></a>
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<div class="memproto">
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::DstProtCtrl</td>
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<p>Destination protection control. </p>

<p>Referenced by <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

</div>
</div>
<a class="anchor" id="ab4afe06f49cc4f916ef106f1e9e367f2"></a>
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<div class="memproto">
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::EndianSwapSize</td>
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<p>Endian swap size. </p>

<p>Referenced by <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

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<a class="anchor" id="af1c78aea07f0790355317bd311ebb3ff"></a>
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::SrcBurstLen</td>
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<p>Source burst length. </p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>, <a class="el" href="group__dmaps.html#gabc2e04f69037f0bdba33275ae017af8a">XDmaPs_GenDmaProg()</a>, and <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

</div>
</div>
<a class="anchor" id="a17ee9116237a176efec405cb12461288"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::SrcBurstSize</td>
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</div><div class="memdoc">

<p>Source burst size. </p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>, <a class="el" href="group__dmaps.html#gabc2e04f69037f0bdba33275ae017af8a">XDmaPs_GenDmaProg()</a>, and <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

</div>
</div>
<a class="anchor" id="a792a21894718b12c8ccf1fa97318dbbf"></a>
<div class="memitem">
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::SrcCacheCtrl</td>
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</div><div class="memdoc">

<p>Source cache control. </p>

<p>Referenced by <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

</div>
</div>
<a class="anchor" id="a3585627ef02899b75c5f2f716d3ab52f"></a>
<div class="memitem">
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::SrcInc</td>
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<p>Source incrementing or fixed address. </p>

<p>Referenced by <a class="el" href="xdmaps__example__w__intr_8c.html#ad138547e71c03c7c9c30a0620a1569d2">XDmaPs_Example_W_Intr()</a>, <a class="el" href="group__dmaps.html#gabc2e04f69037f0bdba33275ae017af8a">XDmaPs_GenDmaProg()</a>, <a class="el" href="group__dmaps.html#ga3691ba115c788c4f68a05cf05c486eeb">XDmaPs_Start()</a>, and <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

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<a class="anchor" id="a3dd33f6f79803e204573e5ca5d88d9d9"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">unsigned int XDmaPs_ChanCtrl::SrcProtCtrl</td>
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<p>Source protection control. </p>

<p>Referenced by <a class="el" href="group__dmaps.html#ga68a8d4fbf7cf6154ad2c58df0479d329">XDmaPs_ToCCRValue()</a>.</p>

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